RISC-V: x86 and ARM are getting serious competition

RISC-V—a new Instruction Set Architecture (ISA)—recently became a trending topic, with tech giants such as Google, Qualcomm, Red Hat, Nvidia, and Intel announcing determined plans to increase the size of the RISC-V ecosystem. 

As the RISC-V ecosystem grows, the question of RISC−V vs ARM vs x86 architectures becomes more clear-cut. Right now, a lack of an ecosystem keeps ARM and x86 processors clearly in the lead, but this is set to change.

Let's dive into the topic of RISC-V architecture, what it is, and why it's important.  

What is RISC-V?

RISC-V (pronounced RISC-five) stands for Reduced Instruction Set Computer, version five. It's an open-source ISA (instruction set architecture) developed at UC Berkeley that allows manufacturers to create microprocessors and microcontrollers without paying license fees. 

The impact of RISC−V architecture on the tech industry

The introduction of an open-source ISA has potentially massive ramifications on the tech industry, with game-changing possibilities if the ecosystem grows fast enough. 

Just some of the key aspects that make RISC-V revolutionary are:

The other significant factor is geopolitical. As tensions rise between the US and China, companies have grown wary of becoming overly dependent on companies that control ISAs. A prime example of this risk is what happened to Huawei, whose shares plummeted as the US government imposed sanctions on it. 

By implementing an open-source ISA, OEMs become independent and can create their own boards and chips.

RISC-V vs ARM: Is RISC-V better than ARM or x86?

Whether RISC-V is "better" than ARM or x86 ISAs depends a lot on the implementation. What sets RISC-V apart is that it's open-source and doesn't require implementors to pay license fees. This is potentially a game-changer for the microprocessor ecosystem, with large players already gravitating toward RISC-V. 

What is RISC-V used for?

RISC-V is suitable for anything from low-powered wearables to high-performance computing and data centers. Similar to the ARM ISA, RISC-V is based on the reduced instruction set computing principle, making it ideal for resource-constrained devices, while allowing it to be customized for use in extremely powerful computers. 

What is the disadvantage of RISC-V?

The primary disadvantage of RISC-V is the lack of implementation. Software written in low-level languages such as C and C++ will need to be rewritten to work on the RISC-V architecture. Software that runs on runtimes will be easier to port but requires the runtime creators to implement a RISC-V-compatible version. 

RISC-V challenges

The RISC-V spec favors customization and configurability. The spec therefore allows for multiple options, variations, and extensions. 

When verifying a RISC-V implementation, the verifier must ensure that implementations adhere to the RISC-V standard while also allowing for future customizations. 

Examples of RISC-V architecture implementations

The greatest challenge in getting RISC-V into wide use is the ecosystem. The RISE Project—RISC-V Software Ecosystem Project—intends to change that. Members of the RISE Project include Google, Intel, Samsung, SiFive, AMD, Nvidia, and MediaTek. 

Collectively, these organizations intend to accelerate RISC-V's adoption by bringing RISC-V-ready products into the market. 

RISC-V boards

Vendors such as SiFive, Microchip, RIOS, and others offer RISC-V development boards for free to qualifying applicants, in the interests of encouraging RISC-V development. 

Dozens of other RISC-V boards also exist for purchase, allowing anyone with the skills to start developing on RISC-V hardware right away. 

RISC-V processors, RISC-V microcontrollers, and RISC-V CPUs

At the core of every RISC-V board is the processor, microcontroller, or CPU that runs the RISC-V instruction set. 

RISE Project premier member Qualcomm teamed up with four other chip giants to speed up "the commercialization of future products based on the open-source RISC-V architecture." Although the new entity purportedly isn't going to develop chips, the fact that major chip manufacturers are behind it indicates that RISC-V chip production will significantly increase in the near future. 

RISC-V operating systems

Several RISC-V operating systems already exist, including multiple Linux ports, such as:

Other popular RISC-V OSes include OpenBSD, FreeBSD, and Android, which we'll talk more in-depth about in a moment. 

RISC-V PC

Building your own RISC-V PC is entirely possible using one of the RISC-V boards previously mentioned, and a compatible RISC-V operating system. 

As for the other meaning of "PC"—a computer running the Windows operating system—no official announcement exists yet regarding Windows compatibility for RISC-V processors. 

If the ecosystem changes, as it looks like it's doing, we can logically assume that Microsoft will eventually jump on the RISC-V bandwagon as well. 

RISC-V News: Google goes all-in with RISC-V Android

Probably the most significant event in forwarding the RISC-V ecosystem was Google's announcement at the 2022 RISC-V summit that it would start accepting Android patches for RISC-V. 

This announcement gained legs in October 2023, when Google officially announced that it intends to mature support for RISC-V in Android. 

THE ANNOUNCEMENT IS A TOTAL GAME-CHANGER!

With over 70% market share, Android device manufacturers can safely create RISC-V devices without fear of a lack of an ecosystem. The enormous market share means that the tables could turn in favor of RISC-V in only a few years. 

Java and Kotlin will automatically run on the new RISC-V architecture for Android, because of the Android Runtime (ART) which compiles Java/Kotlin bytecode into machine code on the device itself. Native app developers, such as many game developers, will need to wait a bit longer before their apps are compatible with RISC-V, but Google is working on this. 

Google intends to make RISC-V a "tier-1" architecture for Android, bringing it on par with ARM. 

Recent instability at ARM reportedly has companies eager to "jump ship" from ARM chipsets. Relying on an independent standard such as RISC-V frees manufacturers from this instability.

What relevance does RISC-V have for Android device manufacturers?

If you operate a fleet of Android devices, such as POS terminals or Android kiosks, the emergence of RISC-V solutions might potentially reduce your costs, considering that RISC-V doesn't require license fees. 

The biggest challenge for Android device manufacturers has always been finding a compatible Android version that works on your specific embedded Android hardware. Although the AOSP ROM (Android Open-Source Project) is open-source, it needs modifications to work on different hardware configurations. 

Google has historically made it incredibly challenging to run Android on non-Google-approved off-the-shelf devices or custom board designs. Companies typically need to run an Android custom ROM when building their own Android-based products. Creating and maintaining a custom ROM is a challenging venture, therefore we offer assistance for companies who need  these customized enterprise-grade ROMs. 

However, the good news about Google's official support for RISC-V is that RISC-V support will ship out of the box, which isn't the case with Android x86 alternatives. Although these RISC-V versions of Android will also need modifications to run on non-Google-approved hardware, the task will be relatively easier than with x86 devices. 

As much as possible, emteria keeps its enterprise version of Android in sync with official Google releases. Once RISC-V support is officially released, we will start implementing that support into our emteria Android OS version so that companies building Android-based products can leverage the benefits of this new technology as soon as possible.